Table of Contents

A gate-level EHW chip: Implementing GA operations and reconfigurable hardware on a single LSI.
On the automatic design of robust electronics through artificial evolution.
Aspects of digital evolution: Geometry and learning.
Evolutionary design of hashing function circuits using an FPGA.
A new research tool for intrinsic hardware evolution.
A divide-and-conquer approach to Evolvable Hardware.
Evolution of astable multivibrators in silico.
Some aspects of an evolvable hardware approach for multiple-valued combinational circuit design.
Adaptation in co-evolving non-uniform cellular automata.
Synthesis of synchronous sequential logic circuits from partial input/output sequences.
Data compression for digital color electrophotographic printer with Evolvable Hardware.
Comparison of evolutionary methods for smoother evolution.
Automated analog circuit synthesis using a linear representation.
Analogue EHW chip for intermediate frequency filters.
Intrinsic circuit evolution using programmable analogue arrays.
Analog circuits evolution in extrinsic and intrinsic modes.
Evolvable hardware for space applications.
Embryonics: A macroscopic view of the cellular architecture.
Embryonics: A microscopic view of the molecular architecture.
Modeling cellular development using L-systems.
MUXTREE revisited: Embryonics as a reconfiguration strategy in fault-tolerant processor arrays.
Building complex systems using developmental process: An engineering approach.
Evolving batlike pinnae for target localisation by an echolocator.
A biologically inspired object tracking system.
The “modeling clay” approach to bio-inspired electronic hardware.
A “Spike Interval Information Coding” representation for ATR’s CAM-Brain Machine (CBM).
Learning in genetic algorithms.
Back-propagation learning of autonomous behavior: A mobile robot Khepera took a lesson from the future consequences.
SPIKE_4096: A neural integrated circuit for image segmentation.
Analysis of the scenery perceived by a real mobile robot Khepera.
Evolution of a control architecture for a mobile robot.
Field programmable processor arrays.
General purpose computer architecture based on fully programmable logic.
Palmo: Field programmable analogue and mixed-signal VLSI for evolvable hardware.
Feasible evolutionary and self-repairing hardware by means of the dynamic reconfiguration capabilities of the FIPSOC devices.
Fault tolerance of a large-scale MIMD architecture using a genetic algorithm.
Hardware evolution with a massively parallel dynamicaly reconfigurable computer: POLYP.
Molecular inference via unidirectional chemical reactions. This book constitutes the refereed proceedings of the Second International Conference on Evolvable Systems: From Biology to Hardware, ICES '98, held in Lausanne, Switzerland in September 1998. The 38 revised papers presented were carefully selected for inclusion in the book from numerous submissions. The papers are organized in topical sections on evaluation of digital systems, evolution of analog systems, embryonic electronics, bio-inspired systems, artifical neural networks, adaptive robotics, adaptive hardware platforms, and molecular computing.